A manufacturing process of a semiconductor device may include a process that exposes the whole surface of a substrate (referred to as “wafer” herebelow), e.g., a semiconductor wafer. For example, JP2015-156472A (Patent Document 1) describes that a resist film made of a photosensitized chemically amplified resist is formed on a surface of a wafer, the resist film is exposed with the use of a pattern mask (pattern exposure), and then the whole surface of the wafer is exposed (flood exposure). By the flood exposure, acid increases in areas of the resist film subjected to the pattern exposure. Thereafter, the wafer is subjected to a heating process and a developing process so that the aforementioned areas are dissolved and a resist pattern is thus formed. The exposure of the whole surface of the wafer is performed by using laterally-arranged plural LEDs (light-emitting diodes) each emitting light downward, and by moving the wafer below the array of LEDs in the back and forth direction.
The CD (Critical Dimension), which is the dimension of the resist pattern formed after development, varies depending on the exposure amounts during the flood exposure. Controlling the exposure amounts in respective portions of the wafer in order to uniformize the CD in the plane of the wafer has been studied. However, as also described later in the “Description of Embodiments” section, in the photolithographic step, there are several factors that make different the CD in respective portions in the plane of the wafer. Since each factor has a unique impact on the CD distribution in the plane of the wafer, the required exposure amount distribution in the plane of the wafer for uniformizing the CD is complicated.